Faculty Profile

Dr. Hafiz Md. Hasan Babu
ডঃ হাফিজ মুহম্মদ হাসান বাবু
Professor
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Journal (38)
- Ankur Sarker, Hafiz Md. Hasan Babu, S. M. Mahbubur Rashid: Design of a DNA-based Reversible Arithmetic and Logic Unit. IET Nanobiotechnology , UK. (2015)
- Ankur Sarker, Tanvir Ahmed, S. M. Mahbubur Rashid , Hafiz Md. Hasan Babu: Design of Reversible Full Adder Circuit Using DNA. American Journal of Bioinformatics . (2015)
- Hafiz Md. Hasan Babu, Nazir Saleheen, Lafifa Jamal, Sheikh Muhammad Sarwar , Tsutomu Sasao: Approach to design a compact reversible low power binary comparator. IET Computers & Digital Techniques. 8(3): 129-139 (2014)
- Md.Shamsujjoha, Hafiz Md. Hasan Babu, Lafifa Jamal: An Efficient Approach to Design a Reversible Control Unit of a Processor. Elsevier Journal of Microelectronics. 44(6): 519-537 (2013)
- Lafifa Jamal, Hafiz Md. Hasan Babu, Md. Masbaul Alam: Design of a Compact Reversible Fault Tolerant Field Programmable Gate Array: A Novel Approach in Reversible Logic Synthesis. Elsevier Journal of Sustainable Computing: Informatics and Systems. 3(4): 286-294 (2013)
- Lafifa Jamal, , Md.Shamsujjoha, Hafiz Md. Hasan Babu: Design of Optimal Reversible Carry Look-Ahead Adder with Optimal Garbage and Quantum Cost. The International Journal of Engineering and Technology. 2(1): 44-50 (2012)
- Lafifa Jamal, Farah Sharmin, Md. Abdul Mottalib, Hafiz Md. Hasan Babu: Design and Minimization of Reversible Circuits for a Data Acquisition and Storage System. The International Journal of Engineering and Technology. 2(1): 9-15 (2012)
- Rubaia Rahman, Lafifa Jamal, Hafiz Md. Hasan Babu: Design of Reversible Fault Tolerant Programmable Logic Arrays with Vector Orientation. International Journal of Information and Communication Technology Research. 1(8): 337-343 (2011)
- Naimul Huda, Shahed Anwar, Lafifa Jamal, Hafiz Md. Hasan Babu: Design of a Reversible Random Access Memory. Dhaka University Journal of Applied Science & Engineering. 2(1): 31-38 (2011)
- Mohammod Akbar Kabir, Hafiz Md. Hasan Babu, Liakot Ali, Lafifa Jamal: Design of a High Performance Low Cost IC Tester - A Conceptual View. Dhaka University Journal of Science. 58(1): 63-66 (2010)
- Noor Muhammed Nayeem, Lafifa Jamal, Hafiz Md. Hasan Babu: Efficient Reversible Montgomery Multiplier and Its Application to Hardware Cryptography. Journal of Computer Science (Science Publications, USA). 5 (1): 49-56 (2009)
- Ashis Kumar Biswas, Md. Mahmudul Hasan, Ahsan Raja Chowdhury, Hafiz Md. Hasan Babu: Efficient Approaches for Designing Reversible Binary Coded Decimal Adders. Elsevier Journal of Microelectronics. vol. 39: 1693–1703 (2008)
- Hafiz Md. Hasan Babu: Logic Synthesis and Minimization of Multiple-Valued Input TANT Networks. The Dhaka University Journal of Science, ISSN: 1022-2502. 56(1): 05-10 (2008)
- Hafiz Md. Hasan Babu, Md. Saiful Islam, Md. Rafiqul Islam, Lafifa Jamal, Muhammad Rezaul Karim, Abdullah Al Mahmud: Building Toffoli Network for Reversible Logic Synthesis Based on Swapping Bit Strings. The Dhaka University Journal of Science. 55(2): 153-156 (2007)
- Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury: Design of a Compact Reversible Binary Coded Decimal Adder Circuit. Elsevier Journal of Systems Architecture. 52: 272-282 (2006)
- Hafiz Md. Hasan Babu, et al: An Improved Method for Minimization of Circuit Using TANT Network. The Dhaka University Journal of Science, ISSN: 1022-2502. 54(1): 49-54 (2006)
- Hafiz Md. Hasan Babu, Tanzeem Iqbal, Chowdhury Farhan Ahmed, Raquibul Hasan, Moinul Islam Zaber, Lafifa Jamal, Shahed Anwar, Mohammad Hamidullah Ahmad: An Optimal Design Method of a Multi-Valued PLA. The Dhaka University Journal of Science. 54(2): 149-152 (2006)
- Hafiz Md. Hasan Babu, Abdur Rahim Mustafa, Md. Sumon Shahriar, Lafifa Jamal, Mohammad Hamidullah Ahmad: An Improved Approach of Minimization of Multi-Valued Multi-Output Logic Expressions. The Dhaka University Journal of Science. 54(2): 141-144 (2006)
- Hafiz Md. Hasan Babu, et al: Reversible Logic Decomposition to Minimize Full-Adder Circuit. The Dhaka University Journal of Science, ISSN: 1022-2502. 54(2): 137-139 (2006)
- Hafiz Md. Hasan Babu, Moinul Islam Zaber: An Approach to Minimize the Multiple-Valued Input Binary-Valued Output functions Using Local Covering. Weases Transaction on Computers, Greece. 10(2): 2381-2389 (2006)
- Hafiz Md. Hasan Babu, Ahmedul Kabir, A.S.M. Fazle Rabbi: On the modified technique for better data compression. Bangladesh Journal of Scientific and Industrial Research (BJSIR). (2003)
- Hafiz Md. Hasan Babu, Md. Rafiqul Islam: Minimization of multilevel AND-EXOR expressions using Pseudo-Kronecker decision diagrams. The Dhaka University Journal of Science. (2003)
- Md. Rafiqul Islam, Hafiz Md. Hasan Babu: A hybrid approach for efficient shortest path algorithm in neural networks. The Dhaka University Journal of Science. (2003)
- Md. Rafiqul Islam, Hafiz Md. Hasan Babu: An improved algorithm for query optimization using materialized view. The Dhaka University Journal of Science. (2003)
- Md. Rafiqul Islam , Hafiz Md. Hasan Babu: An improved technique to create lattice index of materialized views for query optimization. The Dhaka University Journal of Science. (2003)
- Hafiz Md. Hasan Babu, M.L. Rahman: Multiple-valued pseudo-Kronecker decision diagrams: A compact representation of multiple-output functions. The Dhaka University Journal of Science. 50(2): 187-196 (2002)
- Shaily Kabir, M. Karim, Hafiz Md. Hasan Babu: The use of optimal ordering of input variables for simplification of single-output logic functions. The Dhaka University Journal of Science. 50(2): 101-108 (2002)
- Hafiz Md. Hasan Babu, T. Sasao: Upper bound on the size of the shared binary decision diagram for an n-bit adder. Journal of Bangladesh Academy of Sciences. 26(1): 119-121 (2002)
- Hafiz Md. Hasan Babu, T. Sasao: Heuristics to Minimize Multiple-Valued Decision Diagrams. IEICE Trans. Fundamentals, Japan. E83-A(12): 2498-2504 (2000)
- Hafiz Md. Hasan Babu, T. Sasao: Time-Division Multiplexing Realizations of Multiple-Output Functions Based on Shared Multi-Terminal Multiple-Valued Decision Diagrams. IEICE Trans. Inf. & Syst., Japan. E82-D(5): 925-932 (1999)
- Hafiz Md. Hasan Babu, T. Sasao: Representations of Multiple-Output Functions Using Binary Decision Diagrams for Characteristic Functions. IEICE Trans. Fundamentals, Japan. E82-A(11): 2398-2406 (1999)
- Hafiz Md. Hasan Babu, T. Sasao: Time Shared Multi-Terminal Binary Decision Diagrams for Multiple-Output Functions. IEICE Trans. Fundamentals, Japan. E81-A(12): 2545-2553 (1998)
- Hafiz Md. Hasan Babu, M.A. Mottalib: Design of minimized logic networks using EXOR & AND gates by a computer with small memory space. Bangladesh Journal of Scientific and Industrial Research (BJSIR). xxx(2-3): 211-218 (1995)
- Md. Rafiqul Islam, Hafiz Md. Hasan Babu: Heapsort Using Binary Insertion. The Dhaka University Journal of Science. 42(2): 185-193 (1994)
- Md. Rafiqul Islam, Hafiz Md. Hasan Babu: A study on the performance of variations of heapsort. Journal of the Bangladesh Academy of Sciences. 18(2): 201-207 (1994)
- Hafiz Md. Hasan Babu, M.A. Mottalib: A technique for the design of microprocessor memory systems. Dhaka University Journal of Science. 42(2): 185-193 (1994)
- M.A. Mottalib, M.H. Rahman, Hafiz Md. Hasan Babu: A logic minimization technique using Reed-Muller canonic expansion with software implementation. Journal of The Bangladesh Electronics Society. 3(1): 9-1 (1993)
- Hafiz Md. Hasan Babu, M. Kaykobad: An algorithm for designing Boolean functions with Exclusive-OR (EXOR) & AND logic elements. Journal of the Bangladesh Computer Society. 6(1): 49-51 (1993)
Conference (58)
- Ankur Sarker, Mohd. Istiaq Sharif, S. M. Mahbubur Rashid , Hafiz Md. Hasan Babu: Implementation of Reversible Multiplier Circuit Using Deoxyribonucleic Acid. 13th IEEE International Conference on Bio Informatics and Bio Engineering (BIBE), Chania, Greece. (2015)
- Nusrat Jahan Lisa, Hafiz Md. Hasan Babu: Design of a Compact Reversible Carry Look-Ahead Adder Using Dynamic Programming. 28th International Conference on VLSI Design, Bengaluru, India. (2015)
- Nusrat Jahan Lisa , Hafiz Md. Hasan Babu: A Compact Representation of a Quantum Controlled Ternary Barrel Shifter. 2015 IEEE Int'l Symposium on Circuits & Systems, Lisbon, Portugal. (2015)
- Nusrat Jahan Lisa, Hafiz Md. Hasan Babu: Design of a Compact Ternary Parallel Adder/Subtractor Circuit in Quantum Computing. IEEE International Symposium on Multiple-Valued Logic (ISMVL 2015), University of Waterloo, Canada. (2015)
- Lafifa Jamal, Hafiz Md. Hasan Babu: Design and Implementation of a Reversible Central Processing Unit. IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2015), Montpellier, France. (2015)
- Ankur Sarker, Hafiz Md. Hasan Babu: A Novel Approach to Perform Addition and Subtraction Operation Using DNA. 2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, Australia. (2014)
- Nusrat Jahan Lisa, Hafiz Md. Hasan Babu: Minimization of a Reversible Quantum 2n-to- n BCD Priority Encoder. 10th ACM/IEEE International Symposium on Nanoscale Architectures, Paris, France. 77-82 (2014)
- Nusrat Jahan Lisa, Hafiz Md. Hasan Babu: A Compact Realization of an n-Bit Quantum Carry Skip Adder Circuit with Optimal Delay. 2014 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), UK. 270-277 (2014)
- Lafifa Jamal, Hafiz Md. Hasan Babu: Efficient Approaches to Design a Reversible Floating Point Divider. The IEEE International Symposium on Circuits and Systems (ISCAS 2013), Beijing, China. 3004-3007 (2013)
- Lafifa Jamal, Md. Mushfiqur Rahman, Hafiz Md. Hasan Babu: An Optimal Design of a Fault Tolerant Reversible Multiplier. 26th IEEE International System-on-Chip Conference (SOCC 2013), Erlangen, Germany. 37-42 (2013)
- Hafiz Md. Hasan Babu, Lafifa Jamal, Nazir Saleheen: An Efficient Approach for Designing a Reversible Fault Tolerant n-Bit Carry Look-Ahead Adder. 26th IEEE International System-on-Chip Conference (SOCC 2013), Erlangen, Germany. 98-103 (2013)
- Nusrat Jahan Lisa, Hafiz Md. Hasan Babu: A Compact Realization of a Reversible Quantum n-to-2n Decoder. 2013 IEEE 4th International Conference on Electronics Information and Emergency Communication, Beijing, China. 102-105 (2013)
- Tanvir Ahmed, Ankur Sarker, Mohd. Istiaq Sharif, Md. Atiqur Rahman, S. M. Mahbubur Rashid , Hafiz Md. Hasan Babu: A Novel Approach to Design a Reversible Shifter Circuit Using DNA. 26th IEEE International System-on-Chip Conference (SOCC 2013), Erlangen, Germany. (2013)
- Md. Shamsujjoha , Hafiz Md. Hasan Babu: A Low Power Fault Tolerant Reversible Decoder Using MOS Transistors. 26th IEEE International Conference on VLSI Design (VLSID 2013), Pune, India. 368-373 (2013)
- Hafiz Md. Hasan Babu, Md. Shamsujjoha, Lafifa Jamal , Ahsan Raja Chowdhury: Design of a Fault Tolerant Reversible Compact Unidirectional Barrel Shifter. 26th IEEE International Conference on VLSI Design (VLSID 2013), Pune, India. 103-108 (2013)
- Md. Shamsujjoha, Nazma Tara, Lafifa Jamal, Hafiz Md. Hasan Babu: An Efficient Reversible Fault Tolerant Plessey Logic Block of Field Programable Gate Array. 4th Workshop on Reversible Computation, Copenhagen, Denmark (published in Lecture Notes in Computer Science, Springer). (2012)
- Lafifa Jamal, Md. Masbaul Alam, M. A. Mottalib , Hafiz Md. Hasan Babu: On the Compact Designs of Low Power Reversible Decoders and Sequential Circuits. 16th International Symposium on VLSI Design and Test, Shibpur, India, pp. 281-288 (published in Lecture Notes in Computer Science, Springer). (2012)
- Sajib Kumar Mitra, Lafifa Jamal, Mineo Kaneko, Hafiz Md. Hasan Babu: An Efficient Approach for Designing and Minimizing Reversible Programmable Logic Arrays. ACM/IEEE Great Lakes Symposium on VLSI (GLSVLSI), Salt Lake City, Utah, USA. 215-220 (2012)
- Farah Sharmin, Md. Masbaul Alam Polash, Md. Shamsujjoha, Lafifa Jamal, Hafiz Md. Hasan Babu: Design of a Compact Reversible Random Access Memory. 4th IEEE International Conference on Computer Science and Information Technology, Chengdu, China. 103-107 (2011)
- Ankur Sarker, Tanvir Ahmed, S. M. Mahbubur Rashid, Shahed Anwar, Lafifa Jamal, Nazma Tara, Md. Masbaul Alam, Hafiz Md. Hasan Babu: Realization of Reversible Logic in DNA Computing. IEEE 11th International Conference on Bioinformatics & Bioengineering, Taichung, Taiwan. 261-265 (2011)
- Ankur Sarker, Tanvir Ahmed, S.M. Mahbubur Rashid, Shahed Anwar, Hafiz Md. Hasan Babu: New Approach to Design a Reversible Full- Adder Circuit Using Deoxyribonucleic Acid. IEEE 11th International Conference on Bioinformatics & Bioengineering, Taichung, Taiwan . (2011)
- Noor Muhammed Nayeem, Md. Adnan Hossain, Lafifa Jamal, Hafiz Md. Hasan Babu: Efficient Design of Shift Registers Using Reversible Logic. International Conference on Signal Processing, Singapore. 474-478 (2009)
- Abu Sadat Md. Sayem, Md. Masbaul Alam Polash, Hafiz Md. Hasan Babu: Design of a Reversible Logic Block of Field Programmable Gate Array. Silver Jubilee Conference on Communication Technologies & VLSI design, VIT University, Vellore, India. 502-503 (2009)
- Noor Muhammed Nayeem, Md. Adnan Hossain, Md. Mutasimul Haque, Lafifa Jamal, Hafiz Md. Hasan Babu: Novel Reversible Division Hardware. 52nd IEEE International Midwest Symposium on Circuits and Systems, Cancun, Mexico. 1134-1138 (2009)
- Hafiz Md. Hasan Babu: A Novel Approach to Design BCD Adder and Carry Skip BCD Adder. 21th IEEE International Conference on VLSI Design. 566-571 (2008)
- Hafiz Md. Hasan Babu: Minimization of CTS of K-CNOT Circuits for SSF and MSF Model. 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, USA. 290-298 (2008)
- Hafiz Md. Hasan Babu: On the Minimization of Complete Test Set of Reversible K-CNOT Circuits for Stuck at Fault Model. International Conference on Computer and Information Technology (ICCIT 2008), Bangladesh. 7-12 (2008)
- Ahsan Raja Chowdhury, Rumana Nazmul , Hafiz Md. Hasan Babu: A New Approach to synthesize Multiple-Output Functions Using Reversible Programmable Logic Array. 19th IEEE International Conference on VLSI Design, Hyderabad, India. 311-316 (2006)
- Hafiz Md. Hasan Babu: Realization of Digital Fuzzy Operations Using Multi-Valued Fredkin Gates. International Conference on Computer Design and Conference in Computing in Nanotechnology (CDES’06), Las Vegas, Nevada, USA. 101-106 (2006)
- Hafiz Md. Hasan Babu, Md. Sumon Shahriar: An Advanced Minimization Technique for Multiple Valued Multiple Output Logic Expressions using LUT and its Realization using Current Mode CMOS. 8th Euromicro Conference on Digital System Design (DSD’2005), Porto, Portugal. (2005)
- Hafiz Md. Hasan Babu, Amin Ahsan Ali: Design of reversible systolic arrays for digital fuzzy operations. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. (2005)
- Hafiz Md. Hasan Babu, Amin Ahsan Ali: Design of reversible systolic arrays for digital fuzzy operations. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. (2005)
- Hafiz Md. Hasan Babu: Design of a Reversible Binary Coded Decimal Adder Using Reversible 4-bit Parallel Adder. 18th IEEE International Conference on VLSI Design, Calcutta, India. 255-260 (2005)
- Hafiz Md. Hasan Babu, Md. Rafiqul Islam, et. al.: Synthesis of Full-Adder Circuit using Reversible Logic. The 17th International Conference on VLSI Design, Mumbai, India. 757-760 (2004)
- Hafiz Md. Hasan Babu, Islam Zaber, Md. Mazder Rahman , Md. Rafiqul Islam: Implementation of multiple-valued flip-flops using pass transistor logic. The IEEE EUROMICRO Symposium on Digital Systems Design (DSD 2004), Rennes, France. (2004)
- Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Moinul Islam Zaber, Md. Mazder Rahman: On the minimization of multiple-valued input binary-valued output functions. 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), Toronto, Canada. 321-326 (2004)
- Hafiz Md. Hasan Babu, Md. Rafiqul Islam, et. al: A heuristic approach to synthesize Boolean functions using TANT network. IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, British Columbia, Canada, VLSI-L7.4. II: 373 – 376 (2004)
- Hafiz Md. Hasan Babu, Md. Rafiqul Islam, et. al.: A Technique to design minimized multi-valued multi-output logic circuits using pass transistor logic. Proc. of The Work in Progress Session held in Connection with the IEEE EUROMICRO Symposium on Digital Systems Design (DSD 2003), Turkey. 1-2 (2003)
- Md. Rafiqul Islam, Hafiz Md. Hasan Babu, et. al.: A heuristic approach for design for testability of PLAs using pass transistor logic. The twelfth Asian Test Symposium (ATS 2003), China. 90-93 (2003)
- Hafiz Md. Hasan Babu, Md. Rafiqul Islam, et. al.: Reversible Logic Synthesis for minimization of Full-Adder Circuit. The IEEE EUROMICRO Symposium on Digital Systems Design (DSD 2003), Turkey. 50-54 (2003)
- Hafiz Md. Hasan Babu, Md. Rafiqul Islam, et. al: An improved technique to minimize multiple-output switching functions. The International Conference on Computer Science, Software Engineering, Information Technology, e-Business, and Applications (CSITeA-2003), Brazil. 366-371 (2003)
- Hafiz Md. Hasan Babu, Md. Rafiqul Islam , Amin Ahsan Ali: A technique for logic design of voltage-mode pass transistor-based multi-valued multiple-output logic circuits. The IEEE International Conference on Multiple-Valued Logic, Japan. 111-116 (2003)
- Hafiz Md. Hasan Babu, Md. Rafiqul Islam, et. al. : Pass transistor logic circuit based on binary decision diagram for characteristic functions of n-bit adder. th International Conference on Computer and Information Technology (ICCIT 2003), Dhaka, Bangladesh. 894-896 (2003)
- Hafiz Md. Hasan Babu, et. al.: On the Realization of Reversible Full-Adder Circuit. 6th International Conference on Computer and Information Technology (ICCIT 2003), Dhaka, Bangladesh. 2: 880-883 (2003)
- Hafiz Md. Hasan Babu, et. al.: Logic Synthesis and Minimization of Boolean Functions Using TANT Network. 6th International Conference on Computer and Information Technology (ICCIT 2003), Dhaka, Bangladesh. 2: 884-889 (2003)
- Shaily Kabir, Mahmud Karim, Hafiz Md. Hasan Babu: A heuristic method for simplification of single-output logic functions using optimal ordering of input variables. The Second International Conference on Computer and Electrical Engineering (ICECE 2002), Dhaka, Bangladesh. (2002)
- Md. Sheikh Sadi, Chowdhury Mofizur Rahman, Hafiz Md. Hasan Babu: An efficient and coherent method using data mining to cluster web documents. The Second International Conference on Computer and Electrical Engineering (ICECE 2002), Dhaka, Bangladesh . (2002)
- Md. Shahid Alamgir, Md. Ashraful Islam, Shakila Rahman, Qurratul Aine , Hafiz Md. Hasan Babu: An efficient method to design PLA's for multiple-output functions. The Second International Conference on Computer and Electrical Engineering (ICECE 2002), Dhaka, Bangladesh . (2002)
- Md. Mehedi Masud, Chanchal Kumar Roy , Hafiz Md. Hasan Babu: A modified dictionary-based method for data compression. The 4th International Conference on Computer and Information Technology (ICCIT2001), Bangladesh. 66-70 (2001)
- Chanchal Kumar Roy, Md. Mehedi Masud, M.M. Asaduzzaman, Hafiz Md. Hasan Babu: A Modification of Huffman Header. The 4th International Conference on Computer and Information Technology (ICCIT2001), Bangladesh. 62-65 (2001)
- Hafiz Md. Hasan Babu, T. Sasao: A graph-based method for representation of multiple-output functions. The 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL'2000), USA. 147-152 (2000)
- Hafiz Md. Hasan Babu, T. Sasao: Minimization of multiple-valued decision diagrams using sampling method. The Ninth Workshop on Synthesis and System Integration of MIxed Technologies (SASIMI'2000), Japan. 291-295 (2000)
- Md. Mehedi Masud , Hafiz Md. Hasan Babu: An efficient computer algorithm for minimization two-level AND-EXOR logic expressions. International Conference on Robotics, Vision and Parallel Processing for Industrial Automation (ROVPIA'99), Malaysia. 497-502 (1999)
- Hafiz Md. Hasan Babu, T. Sasao: Shared multiple-valued decision diagrams for multiple-output functions. The 29th IEEE International Symposium on Multiple-Valued Logic (ISMVL'99), Germany. 166-172 (1999)
- Hafiz Md. Hasan Babu, T. Sasao: Representations of multiple-output functions by binary decision diagrams for characteristic functions. The Eighth Workshop on Synthesis and System Integration of MIxed Technologies (SASIMI'98), Japan. 101-108 (1998)
- Hafiz Md. Hasan Babu, T. Sasao: Design of multiple-output networks using time domain multiplexing and shared multi-terminal multiple-valued decision diagrams. The 28th IEEE International Symposium on Multiple-Valued Logic (ISMVL'98), Japan. 45-51 (1998)
- Hafiz Md. Hasan Babu, T. Sasao: Representations of multiple-output logic functions using shared multi-terminal binary decision diagrams. The Seventh Workshop on Synthesis and System Integration of MIxed Technologies (SASIMI'97), Japan. 25-32 (1997)
- Hafiz Md. Hasan Babu, T. Sasao: A method to represent multiple-output switching functions by using binary decision diagrams. The Sixth Workshop on Synthesis and System Integration of MIxed Technologies (SASIMI'96), Japan. 212-217 (1996)
Alumni Students
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